A modem radio receiver, such as the radio receiver 100 shown in FIG. 1A, includes a demodulator 101 which utilizes a phase-locked loop (PLL) 102 including a voltage controlled oscillator (VCO) 103 to demodulate an analog RF input signal received at antenna 104 by projecting the RF input signal onto a rotating orthogonal basis comprising an in-phase (I) and a quadrature-phase (Q) coordinate system. Projection is accomplished by first multiplying, using a multiplier 105, the incoming signal by the local oscillator signal cos(2π·fPLL·t) to obtain the in-phase component I of the RF signal, and filtering the resulting signal using a low-pass filter 109. Similarly, projection of the quadrature component of the RF input signal is obtained by multiplying, using a multiplier 107, the incoming signal by an orthogonal, 90-degree phase-shifted output of the local oscillator sin(2π·fPLL·t), wherein the 90 degree phase shift is with respect to the frequency of the PLL 102, and filtering the resulting signal using a low-pass filter 111. The resulting signals can be provided as input to analog-to-digital (A/D) converters 115, 117 for further processing, before being output from outputs 119a and 119b of the receiver 101. Once the RF signal has been projected onto the I/Q coordinate system amplitude and/or phase information is available since the pair of coordinates [I,Q] specify a unique vector from the origin to the measured coordinates. A transformation also may be used to convert I/Q pair into an r, theta basis function which is also an orthogonal basis. To ensure proper demodulation, it is necessary to accurately distinguish where sampled data points lie in the coordinate system as the location on the coordinate system at a given instant in time is the fundamental basis by which symbols are differentiated from one another.
Most modern I/Q radio-receiver mixers (e.g., multipliers 105 and 107 of demodulator 101) are driven by amplitude-limited drivers—for example a rail-to-rail signal generated by one or more inverters or a buffer is often used to drive mixer switches. Thus, amplitude noise of the local oscillator is of relatively little consequence since amplitude noise is regenerated out of the demodulation signal by the time the demodulation signal reaches the mixer switches. Phase noise, on the other hand, may be considerable because the phase noise has no such mechanism to restore the phase to ideal in the face of disturbances except the PLL. As a result, phase noise in a clock signal PLL_CLK provided by a PLL 102 to a demodulator 101 is generally not attenuated, and results in noise in the demodulated signal at output 119 of the demodulator 101. Referring to FIG. 1B, the PLL is updated at a rate (i.e. a PLL update frequency) which is generated (either directly or using a divided down version) from a stable oscillation signal OSC_CLK such as provided by a quartz crystal oscillator (e.g., oscillator 113 of FIG. 1A). The PLL attenuates phase noise from the VCO below the bandwidth of the PLL, performing no such attenuation for signals above the PLL loop bandwidth. To ensure PLL stability, the bandwidth of the PLL is generally chosen to be substantially lower than the PLL update frequency (generally 5-10× lower). Thus, the PLL attenuates only close-in phase noise signals, with a bandwidth often many times lower than the frequency of the oscillator signal OSC_CLK. When an integer-N PLL is used, the PLL update frequency may be constrained to be lower than otherwise desirable due to channel-spacing requirements. In general, the PLL output signal PLL_CLK has a higher frequency than the oscillator signal OSC_CLK (e.g., OSC_CLK has a frequency that is a ratio of integers M/N times higher than the PLL_CLK frequency), and a divided-down version of the PLL output signal PLL_CLK (e.g., divided by an integer N) may thus be used for edge comparison with a divided-down version of the oscillator signal (e.g., divided by an integer M) as shown in FIG. 1B.
Referring to FIG. 1C, a VCO is shown with a first phase-noise characteristic (such as provided by a L-C oscillator) with (154) and without (152) a PLL having a bandwidth of 100 kHz. Referring to FIG. 1D, a VCO is shown with a noisier phase-noise characteristic (such as provided by a ring-oscillator) with (158) and without (156) a PLL bandwidth of 100 kHz. As can be seen by comparison of the two characteristics, the phase noise of the LC oscillator is substantially lower than the phase noise of the open-loop VCO comprising a ring oscillator, and substantially lower than the phase noise of the closed-loop PLL VCO comprising a ring oscillator even within the bandwidth of the PLL. When the phase-locked loop VCO is used to drive mixer switches of a radio mixer or initiate a sampling operation in an analog-to-digital converter (ADC), the phase noise causes timing jitter. Timing jitter results in a decrease in the output-signal fidelity because the jitter causes the desired signal to be modulated, thereby converting a portion of the desired energy into noise. This noise has the effect of increasing the error vector magnitude (EVM) of the symbol constellation generated at the mixer outputs from the I/Q demodulated data, since phase noise causes the orthogonal basis functions to deviate from a constant rotation rate. Similar deleterious behaviors are observed in sampling of a signal by a stand-alone ADC.
The phase noise is generally specified as dB with respect to the energy at the fundamental frequency at a given frequency offset from the carrier. The noise is generated from various stochastic and deterministic sources including thermal noise, flicker noise, shot noise, and power-supply or reference noise. The phase noise of an oscillator may be reduced by increasing the amount of energy stored in the oscillator thereby attenuating the relative effects of the various noise sources. Increasing the total VCO energy often requires use of an inductor, which is large in terms of area. The design choice of using an inductor for the VCO comes with the additional disadvantage that a large amount of power must be consumed by the VCO to maintain oscillation at the desired energy/loss ratio. Furthermore, use of an inductor-based VCO exposes the device to susceptibility to electromagnetic interference from external sources, such as an on-board or on-chip DCDC converter comprising an inductor.
A noisy but otherwise acceptable VCO may be formed in a 65 nm process using a three tap ring oscillator. To give an idea of the performance of such a ring oscillator simulations were run yielding a 5.8 GHz ring oscillator that draws 25 uA from a 0.8V supply (corresponding to a power consumption of 20 uW) and has a phase noise of −66 dB/Hz at 1 MHz offset. Note, however, that the phase noise of the ring oscillator is substantially higher than the phase noise of the LC oscillator. Conventional techniques would require a ring oscillator to run at a much higher current and/or use of a very high bandwidth PLL to suppress in-band phase noise. Both of these choices cause dramatic increase in power consumption. Finally, in some embodiments even the use of an inductor-based VCO yields inadequate phase noise performance.
A need therefore exists for systems and methods for providing PLLs and VCOs having reduced phase noise or jitter without requiring a substantial increase in circuit power consumption.